NETAC NV7000-t 2TB NVMe SSD Review – Complete Far East in cool and fast

1 - Introduction, unboxing and technical data 2 - Temperatures, power draw, controller, NAND and pSLC cache 3 - Synthetic benchmarks 4 - Application benchmarks and conclusion

Power consumption and temperatures

I had already written that you can use the SSDs almost uncooled. In idle mode it is around 800 mW that I can measure on the adapter. In normal mode (workstation workloads, gaming), the entire SSD consumes around 3 watts, which is an absolute top value for a 2 TB PCIe-4 SSD. The maximum of 5 watts in peak (typically 4 to 4.8 watts) during continuous copying is also nothing to be afraid of. Thermal throttling is supposed to start at around 90 °C, but I couldn’t even come close to that even without a cooler. Further heating stopped at around 70 °C in the stress test, and it is not normally 46 °C during gaming. Without a cooler, mind you. The temperature drops by up to 10 degrees with a simple cooling system on the back.

Controller and NAND memory

NETAC uses a MAP1602A from Maxio as controller (see also reference board). This is a spin-off from JMicron, which had already produced various SSD controllers in the past. This highly interesting controller already uses the 12 nm node from TSMC and an ARM Cortex R5 core with co-processors. It has four channels and is completely DRAM-free, which ultimately also contributes to increased efficiency. In contrast to other DRAM-less PCIe 4.0 controllers, like the one on the Corsair MP600 GS I tested the other day, this one has a 2400 MT/s bus, which should also be good for efficiency and might annoy Phison.

Not much is known about the controller, but it supports both Trim and S.M.A.R.T.. Like other controllers, it uses Active State Power Management (ASPM), Autonomous Power State Transition (APST) and the L1.2 ultra-low power state. Thermal throttling is implemented, but is not a big deal since the controller does not get too hot in most use cases. This can also be seen in the fact that, in contrast to many other models, an integrated nickel heatsink can be dispensed with. Unfortunately, you won’t get much more data, because the public accessibility of the information is still very limited.

I have already written several times that the SSD has to do without a dedicated DRAM cache. Instead, it accesses the computer’s normal system RAM via the host memory buffer (from Windows 10). This can certainly be done, because normally even this standard NVMe feature is enough to compensate for the lack of a dedicated DRAM cache. However, we will see what can happen sporadically with AJA streaming in a moment.

The Maxio controller communicates with the NAND via four very fast NAND flash channels with up to 2400 MTps (1600 MTps are normal) and supports capacities of up to 4 TB. Our sample contains two NAND modules on one side. This flash, binned and labeled by NETAC, is 3D TLC from YMTC. The 232-layer variant on my SSD is even the latest expansion stage, but various political shenanigans prevented the top dogs like Micron from becoming dangerous with their own (and even more efficient) NAND just months ago. But such discussions don’t belong here. But it is annoying. MAGA and so…

This flash has the Xtacking technology and as a newer iteration also already has a different 2×2 layer layout than the original 128 layer design. Strictly speaking, it is a well-known wafer-on-wafer technology to connect separate CMOS circuits on an inverted flash array (FlipChip). Certain other flash manufacturers place the CMOS under the memory array instead. The YMTC design also offers advantages in terms of chip density and efficiency, but is somewhat more costly to produce as a result.

What does dynamic pSLC cache actually mean?

Now we come to a somewhat more technical detail, which most people might not be aware of to the full extent. A lot has already been written about pSLC cache, so there’s no need to go through it again in detail, at most as a small refresher. Here we go…

To increase the write speed, the so-called “pseudo-SLC cache” (pSLC) is often used in consumer products, although it can now also be found in various industrial solutions. For this, part of the NAND capacity is configured as SLC memory, in which only one bit per cell is stored. Accordingly, this memory can be written and read very quickly. Since it is not dedicated, i.e. not a real SLC memory, it is called pseudo SLC. Such a cache can be used for all memory types that store several bits per flash cell, i.e. three bits as here with TLC. The pSLC cache also uses a significantly higher voltage for the one bit, which provides a certain level of security and is therefore better than Fast Page.

The use of pSLC cache offers a speed advantage, especially when the storage medium is not busy with read or write accesses between writing larger amounts of data. This idle time is used by the storage medium to move data from the cache to the TLC area.

But everybody knows the disadvantages of the pSLC. When the fast pSLC cache is full, the speed drops significantly because further write accesses to the storage medium must first free the pSLC by moving older data from the cache to the TLC memory.

But what is the meaning of “dynamic pSLC cache”? Dynamic pSLC cache has now also found its way into industrial memory solutions, but only with very hard restrictions. In contrast to the static pSLC cache, up to 100 es of NAND flash are used dynamically as pSLC cache, depending on how full the storage medium is. The cache can therefore cover up to 1/3 of the total memory size

However, the write speed of the storage medium depends not only on the amount of data that is written without interruption, but also on the fill level of the memory. And this is exactly what makes the write speed in the life cycle difficult to predict.

Although NAND flash manufacturers advise against dynamically changing the configuration of flash blocks as pSLC or TLC memory for reasons of reliability, this is seen in a more relaxed way in the consumer sector, where temperature windows are not so much of an issue.

All manufacturers of dynamic NAND storage media, including YMTC, permanently switch back to TLC mode after a specified maximum number of program and erase cycles. Before that, the storage medium achieves the best values especially during short write operations that do not require the entire capacity. However, the medium is permanently slowed down after a certain usage time, which should never be ignored. Phison’s E18 masters the dynamic change of the configuration of flash blocks quite well, but it can’t outsmart physics either.

When you will reach the end of the great cache performance is a thing with imponderables here. The glory ended after 75 GB in one piece and the capacity of 85 GB is only on a mediocre SATA level. This will hardly be possible in practice, but it’s better not to write to the full capacity in one go and perhaps more often.