Intel Granite Rapids-D CPU first appeared, replacement for Ice Lake-D?

Intel’s support document officially names Granite Rapids-D for the first time. The Xeon D models will be the successors of Ice Lake-D, which were released a year ago as Xeon D-1700 and D-2700 and replaced Skylake at the time. Granite Rapids-D is also expected to hit the market late. Intel is already describing the feature set of the new processors, though they may still undergo changes. The server processors, known as Granite Rapids-AP and Granite Rapids-SP, are expected to be available from late 2024, while the smaller Xeon D is unlikely to appear before 2025. The task field of the processors is likely to expand somewhat in the process. Currently, they are mainly used in the communications and networking sector, but also in many industrial areas up to the Internet of Things (IoT).

Source: yuuki_ans[/caption

> +@item graniterapids-d
> +Intel graniterapids D CPU with 64-bit extensions, MOVBE, MMX, SSE,
SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE,
PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE,
RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F,
AVX512VL, AVX512BW, AVX512DQ, AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA,
AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID,
AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, MOVDIRI, MOVDIR64B,
VX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE,
TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16,
AVX512BF16, AMX-FP16, PREFETCHI and AMX-COMPLEX instruction set support.

After the stone was set rolling, further information promptly becomes known. Among other things, these show that Intel is once again launching two basic chips: Granite Rapids-D as MCC and XCC, for a medium number of cores or the highest expansion stage. These are each based on the same compute die of the regular Intel Granite Rapids, using either the LCC (low core count) version or the HCC (high core count) variant.

This is also accompanied by the expansion of the memory controller: the MCC model has four channels, while the XCC chip offers eight memory channels, which come from the corresponding CPU die. An I/O die also enables a large number of additional connections, whereby two of them are installed in the XCC chip. First pictures of planned motherboards confirm this information.

Source: ComputerBase