CORSAIR MP600 Elite 2 TB NVMe SSD review – Elite is just the name and the price

1 - Introduction, unboxing, technology and data 2 - Controller, NAND and the dynamic pSLC cache 3 - Synthetic benchmarks and streams 4 - Application benchmarks and summary

The 5 to a good 7 watts peak (measured) at maximum load also need to be dissipated well from the top, which is why Corsair has used very soft and sticky pads. Once you have removed these, you can see the PCB, which is again from TECHVEST, but has been customized for Corsair and also assembled for Corsair. In contrast to the faster models, the MP600 Elite no longer uses the Phison E18, but instead deliberately relies on the smaller and more economical Phison E27.

This only has one core (ok, there are a total of three together with the co-processor) and with four NAND channels only half of the Pro XT. The SSD also has to do without a dedicated DRAM cache and instead accesses the computer’s normal system RAM via the host memory buffer (from Windows 10). This is perfectly acceptable, as even this standard NVMe feature is normally sufficient to compensate for the lack of a dedicated DRAM cache.

The E27T controller works with the PCIe 4.0 interface and was developed using 12nm process technology. Despite its impressive performance features, including read and write speeds of up to 7,400 MB/s and 6,700 MB/s respectively, the E27T retains a DRAM-less architecture. This approach simplifies SSD design and potentially lowers production costs. It is a low-power PCIe Gen 4 SSD controller that is actually designed for the 2230 form factor of M.2 SSDs, which are designed for handheld gaming devices such as the Steam Deck and ROG Ally.

This controller still uses TSMC’s older 12nm process and features what Phison calls “Single CPU Architecture”. Similar to the PS5031-E31T, this Gen 4 rated PS5027-E27T controller supports 8TB of storage and supports 3D TLC and QLC NAND flash. The sequential performance theoretically reaches up to 7,400MB/s for read and 6,700MB/s for write and the random performance is a maximum of 1,200,000 IOPS (read and write). The controller communicates with the NAND via all four NAND flash channels and my sample contains two stacked modules 3D TLC (T2BIGA5A1V – Kioxia BiCS6, 162 layers) on one side, which easily fit thanks to the small size of the controller. However, as already mentioned, the design no longer uses a DRAM-based architecture.

The Phison E27T complies with the NVMe 1.4 specification and has a range of standard functions. It supports both Trim and S.M.A.R.T.. Like other controllers, it also uses Active State Power Management (ASPM), Autonomous Power State Transition (APST) and the L1.2 ultra-low power status (see data sheet page 1). Thermal throttling is implemented, but is not important as the controller does not get too hot in most applications.

It also uses the fourth generation LDPC ECC engine, SmartECC (RAID ECC) and end-to-end data path protection for robust error correction and improved data reliability. It even supports hardware-accelerated AES 128/256-bit encryption (which is TCG, Opal 2.0 and Pyrite compliant) and has a built-in crypto-erase function. The E27T from Phison supports fully dynamic write caching. However, the size of the implemented dynamic pSLC cache, which I will discuss in a moment, is severely limited. Phison has also implemented SmartFlush, which enables fast cache recovery for predictable and consistent performance. So much for the theory.

What does dynamic pSLC cache actually mean?

Let’s now move on to a somewhat more technical detail that most people are probably not fully aware of. A lot has already been written about pSLC cache, so there’s no need to go through it again in detail, at most as a little refresher. Here we go…

To increase the write speed, the so-called “pseudo-SLC cache” (pSLC) is often used in consumer products, although it can now also be found in various industrial solutions. For this purpose, part of the NAND capacity is configured as SLC memory, in which only one bit per cell is stored. Accordingly, this memory can be written and read very quickly. As it is not dedicated, i.e. not real SLC memory, it is called pseudo SLC. Such a cache can be used for all memory types that store several bits per flash cell, i.e. three bits as in the case of TLC. The pSLC cache also uses a significantly higher voltage for the one bit, which offers a certain level of security and is therefore better than Fast Page.

The use of pSLC cache offers a speed advantage, especially when the storage medium is not used with read or write accesses between writing large amounts of data. These idle times are used by the storage medium to move data from the cache to the TLC area.

But everyone knows the disadvantages of the pSLC. When the fast pSLC cache is full, the speed drops significantly, as further write accesses to the storage medium must first free up the pSLC by moving older data from the cache to the TLC memory.

But what does “dynamic pSLC cache” actually mean? Dynamic pSLC cache has now also found its way into industrial storage solutions, but only with very severe restrictions. In contrast to the static pSLC cache, up to 100% of the NAND flash is used dynamically as a pSLC cache, depending on how full the storage medium is. The cache can therefore comprise up to 1/3 of the total memory size

However, the write speed of the storage medium depends not only on the amount of data that is written without interruption, but also on the fill level of the memory. And this is precisely what makes the write speed in the life cycle difficult to predict.

Although NAND flash manufacturers advise against dynamically changing the configuration of flash blocks as pSLC or TLC memory for reasons of reliability, in the consumer sector, where temperature windows are not so important, this is viewed somewhat more relaxed.

All manufacturers of dynamic NAND storage media, including Micron, permanently switch back to TLC mode after a specified maximum number of program and erase cycles. Before this, the storage medium achieves the best values, especially for short write operations that do not require the entire capacity. After a certain period of use, however, the medium is permanently slowed down and this should never be ignored. The E18 from Phison is quite good at dynamically changing the configuration of flash blocks, but it can’t outwit physics either.

When you will reach the end of the great cache performance is a matter of uncertainty. After exactly 47.98 GB in one piece, the glory came to an end and at more than 80% of the capacity you are only at a mediocre SATA level anyway. In practice, you’ll hardly be able to manage that, but it’s better not to fill up in one go and perhaps more often.