AMD Epyc 8004 and the Socket SP6 – AMD goes one better

AMD is now officially finalizing the 4th generation of the EPYC family with the AMD EPYC 8004 processors designed specifically for cloud services. The new processors deliver exceptional power efficiency and strong performance in an optimized, single-socket package, supported by Dell Technologies, Ericsson, Lenovo, Supermicro and others, and validated for Microsoft Azure Stack HCI.

So today announced the availability of the new AMD EPYC™ 8004 series processors, completing the 4th generation of the AMD EPYC CPU family of workload-optimized processors. These new processors integrate the “Zen 4c” core into a purpose-built CPU, enabling hardware vendors to create energy-efficient and differentiated platforms that can power applications from the intelligent edge, such as retail, manufacturing and telco, to the data center for cloud services, storage and others. The following table shows each model and specification:

Dich what is new and what is not? Zen 4c is designed as a simplified variant of Zen 4 and presents a significantly scaled-down structure with many cores, an unchanged L2 cache and a reduced L3 cache. While a Zen 4 processor requires a package of eight CPU dies with eight cores each to create 64 cores (and a constant 12 for up to 96 cores in Genoa), Siena relies on just four CPU dies that house 16 cores each. Compared to the Rome-generation Epyc processor, which required eight chips for the same number of cores, the new model presents itself significantly slimmer. Both Siena and Bergamo focus on an efficient environment with a nevertheless demanded high performance, whereby the clock rate of the smaller cores is limited with a maximum of 3.1 GHz.

The consistency in features that Siena shares with the larger Zen 4 chips, Genoa and Bergamo, is also achieved through the similar but also somewhat slimmed-down I/O die, resulting in a halving of the memory interface from twelve to six channels, but should not be detrimental to power consumption. Siena allows the use of up to 1,152 GBytes of DDR5-4800 in twelve slots through 96 GByte DIMMs. The inclusion of six PCIe Gen5 lanes and other features also underscores that Siena is unlikely to be limited in terms of performance capabilities. You can get all the details from the slides:

Efficiency and performance for traditional data centers and Intelligent Edge

AMD EPYC 8004 Series processors extend the performance and efficiency leadership of the 4th generation EPYC family to markets that seek strong performance but also have significant requirements for energy efficiency, platform density and quiet operation. AMD EPYC 8004 Series processors offer exciting benefits to customers and partners (performance data here is based on AMD’s own benchmarks and surveys):

• Excellent energy efficiency for Intelligent Edge. Leveraging the efficient “Zen 4c” core and the new SP6 socket, which provides optimized memory and I/O capabilities, the EPYC 8004 Series processor can deliver up to 2x better SPECpower® performance per system watt over the most powerful competitive network model.
• Balanced Performance. In an industry that demands the ultimate performance-per-watt capabilities for space- and infrastructure-constrained environments, AMD EPYC 8004 Series processors deliver the balanced performance and superior power efficiency needed at the edge. In a video encoding workload, the EPYC 8324P offers up to 1.16x the per-core performance over the comparable competitive network product. In an IoT Edge Gateway workload, a server powered by an eight-core EPYC 8024P can provide ~1.8x the total throughput performance per 8kW rack compared to the competitive eight-core processor.
• Optimize savings for Intelligent Edge deployments. Intelligent Edge deployments focus on smaller nodes of servers, rather than full racks as expected in a data center. For an Intelligent Edge implementation of one, three or 10 servers, the energy efficiency of an AMD EPYC 8004 series processor-based server can save customers thousands of dollars in energy costs over a five-year period, with better core density and throughput, compared to the competition.

Text and images were provided by AMD under BDA. The condition was to meet the embargo deadline of 3 p.m. on Sept. 18, 2023.