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AMD’s hybrid Phoenix 2 APUs contain both Zen 4 performance and efficiency cores.

AMD released the processor programming reference for Zen 4 last month. The AMD Zen 4 (also known as AMD Family 19h Model 70h A0 or Phoenix Family) is the company’s latest processor family. In the programming reference, the company discloses important information about the features and functions of the new processors. An important announcement in the programming reference is the introduction of performance and efficiency kernels. These new cores are part of a hybrid CPU architecture that is based on what AMD’s competitor Intel has done with its Alder Lake (12th generation). Generation) and Raptor Lake (13. Generation) processors.

The hybrid CPU architecture combines different types of cores to optimize both performance and efficiency. The performance cores are designed for demanding applications like gaming and video rendering, while the efficiency cores can be used to run less demanding applications like web browsing and email. By combining performance and efficiency cores, the CPU can achieve the best balance between performance and energy efficiency.

The introduction of performance and efficiency cores is an important step for AMD as it should help the company compete with Intel and other leading semiconductor manufacturers in the market. With the new hybrid CPU architecture, AMD processors can deliver superior performance with improved efficiency for both demanding applications and less demanding applications. Overall, the release of the processor programming reference for the AMD Zen 4 is an important milestone for AMD and the computing industry as a whole.

Source: AMD

A Twitter user named “InstLatX64” recently leaked AMD’s PPR guide. The Processor Programming Reference (PPR) guide is a technical document that describes the details of a microprocessor’s architecture and design to help developers effectively write software that runs on the processor. The leaked guide shows AMD’s two cores, which were previously unknown to the public. Interestingly, the guide also includes a mention of the similarity of AMD’s naming scheme to Intel’s naming scheme.

Intel has historically divided its processors into families and given each processor within a family a unique name. AMD has adopted a similar scheme with its Ryzen processors, dividing processors into families and giving each processor within a family a unique name. The similarity of the naming schemes could mean that AMD is trying to compete with Intel in the computer processor market in this constellation as well.

AMD has gained a lot of attention and market share in recent years, especially with its third and fourth generation Ryzen processors, which are popular with gamers and other PC enthusiasts. It remains to be seen what AMD’s new cores will look like and what advantages they will offer over the current Ryzen processors. However, the leak of the PPR guide has already sparked excitement in the technology community and raised expectations for AMD’s upcoming products.

A hybrid architecture typically combines different technologies or approaches to achieve an optimized result. In the case of consumer processors, this would mean that the company combines different processor technologies to achieve the best possible performance and efficiency. A hybrid architecture could be beneficial for the company as it would open up more possibilities for the design of its processors. By combining different technologies, the company could adapt its processors to different application areas and customer needs. In particular, a hybrid architecture could be used in devices such as PC gaming handhelds and low-power laptops that have special performance and efficiency requirements. PC gaming handhelds are portable gaming systems that usually have high performance to run demanding games.

Source: AMD

Compared to Intel, AMD uses the same Zen 4-core architecture for their performance and efficiency cores. The P cores are the standard designs available on the existing Ryzen 7000 chips. However, the tuned Zen 4 cores have a reduced cache and clock rates to focus on pure performance efficiency. Although this configuration is interesting, it is not known when these APUs will be introduced. The AMD Phoenix Ryzen 7045 APU lineup is expected to hit the market next month after a short delay.

The Phoenix 2 Hybrid APU lineup could be unveiled either at CES 2024 or sometime in the second half of 2023. It is interesting to see how AMD and Intel take different approaches in using different architectures for their performance and efficiency cores. Using the same Zen 4 core architecture for both types of cores from AMD could offer some advantages, such as higher compatibility and less fragmentation in the development of applications and drivers. However, it remains to be seen how well this new APU configuration will prove itself in practice.

Source: WccfTech

 

Kommentar

Lade neue Kommentare

RX480

Urgestein

1,911 Kommentare 899 Likes

Net schlecht für Mini-PC´s und Notebooks.

bin mal gespannt wie die APU mit dem Ram skaliert

Antwort Gefällt mir

Casi030

Urgestein

11,923 Kommentare 2,339 Likes

Das sieht doch gut aus,vollwertige Kerne die etwas Abgespeckt sind,der Prototyp läuft ja schon als 3D,somit könnte man davon aus gehen das bei Vollast alle Kerne nahe zu gleich Takten und bei den Effizienz Kernen der hohe Turbo fehlt.Jetzt muss die Software nur richtig Schalten und die Performance Kerne anständig schlafen legen und nicht immer wieder Aufwecken.

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ecth_

Mitglied

30 Kommentare 3 Likes

Ja, ich dachte auch, dass die 5950X3D und 5900X3D CPUs strenggenommen schon eine hybride Architektur haben. Mit allen Vor- und Nachteilen. Nun noch eine Möglichkeit, dass die Nutzer selbst gezielt eingreifen können, wie etwa alte Games gezielt auf E-Cores laufen lassen und ein möglichst selbstständig schlauer Scheduler, der solche Muster (Dauerlast, aber bei weitem keine 100% Auslastung) gut erkennt und selbst auf die E-Cores legt.

Prinzipiell ein alter Hut, haben wir in den Handys ja auch oft. Viele günstige Handys haben ja sogar eine big-Big-LITTLE Architektur, obwohl alle Kerne auf demselben Stromspar-Design, wie dem A53 basieren und dann eben mit 1x 3GHz, 3x 2,5GHz und 4x 1,8GHz getaktet sind (die genauen Zahlen im Beispiel frei aus dem Gedächtnis geraten).

Diese Technik mit der Cache-Menge zu koppeln ist aber wirklich interessant. Selber Befehlssatz macht es echt einfacher. Bin gespannt, was noch an Optimierungen kommt :)

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Danke für die Spende



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Samir Bashir

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