Reviews

AMD's Ryzen 7 1800X in review

                                   

The Impact of P-States on Performance

In several of our gaming benchmarks, we noticed lower-than-expected performance results and, after consulting with AMD, used Windows' high-performance power profile to improve gaming performance. This attitude brought improvements, but the Ryzen CPUs were still below their Intel competitors.

P-States adjust the Dynamic Voltage Frequency Scaling (DVFS) clock rate and voltage to save power when the processor is underutilized. In the balanced Windows profile, the operating system adapts the P-states of the CPU to the workload intensity through EIST. Unfortunately, the command latency between CPU and operating system limits the efficiency of this technique.

In addition, the CPU cannot jump directly from a low to the highest clock frequency, but must gradually work its way through the intervening states until it reaches the maximum clock (hence the term "Speed Step"). The whole thing results in successively higher latency when switching from low P-states to the maximum clock frequency.

FOR AMD's Ryzen 7 processors, there is 30ms latency when Windows changes the P-state. And if AMD's implementation is similar to Intel's (we've checked, but we're still waiting for answers), the processor would have to switch through multiple P-states to perform to full performance. Intel's Skylake processors were also affected by a 30ms delay caused by the operating system, which had a negative impact on responsiveness when running workloads with fast-changing loads.

Intel added more P-States to its Skylake processors and reduced switching latency to 15 milliseconds for its Kaby Lake CPUs. As a result, AMD's Ryzen 7 processors take twice as much time (30 ms) as Intel's Kaby Lake processors to switch between P-states when the operating system controls the P-States.

To bypass this latency, Microsoft allows the operating system to pass P-State control to the processor, whether it's from Intel or AMD. This allows the CPU to use its own internal sensor data for decision-making to adjust performance according to the data, eliminating the latency of the operating system. Choosing the Maximum Power power profile activates this feature. When this profile is active, both AMD and Intel processors switch between P-states within a millisecond. In AMD's view, this is a level playing field.

We tested popular games on Intel processors with the "Balanced" profile, but for AMD's Ryzen processors we list both the results under "Balanced" and under "Maximum Performance".

We are, of course, sticking to AMD when it comes to the P-State hierarchy.

The dilemma in cache testing

The Reviewers Guide for Ryzen contains an interesting note regarding L1, L2 and L3 measurement tools. AMD suggests that AIDA64 and SiSoft Sandra, both very common cache measurement tools, are "not yet ready to accurately measure the cache performance of the Zen architecture."

AMD provided its own internally measured benchmarks, noting that it was working with final ware (AIDA) and SiSoft-Sandra teams to enable accurate methodology of Zen cache measurements in the future.

Of course, we also measured performance with these utilities and achieved similar results for Intel's 6900K, but we also noticed a large gap between the Ryzen measurements supplied by AMD and our test results. We measured Ryzen's L3 cache latency at 20 to 23 milliseconds– twice the value supplied by AMD.

Due to the performance characteristics we noticed when benchmarking games, we also tested the cache with SMT enabled and disabled, but the results were within the expected fluctuation range. We also measured a memory latency gap of about 10 nanoseconds in favor of the Intel processor.

Many common utilities write zeros into the cache to measure its performance. AMD responded to our requests by saying that Intel is merging incoming "zero" traffic before it is flushed to the cache. This could result in artificially increased cache throughput measurements– in part because such patterns do not occur in real-world use.

In our opinion, changing access patterns would result in reduced performance results for Intel processors, but certainly not improve AMD's cache measurements. AMD responded that the utilities currently available were not optimized for Zen's unique architecture and that optimizing their code paths would show more performance.

We contacted both SiSoft and FinalWire and requested updated or beta versions of their utilities to enable more accurate testing. Currently, the cooperation between the two companies and AMD is still in full swing and we are unfortunately unable to reveal any details of this conversation at this point.

By the time SiSoft, FinalWare, and AMD agree on what exactly is happening and what impact it will have on Ryzen, a final conclusion of our measurement results would be irresponsible and ultimately misleading. If we have final, verified and "real" results, we will deliver them.

 

Danke für die Spende



Du fandest, der Beitrag war interessant und möchtest uns unterstützen? Klasse!

Hier erfährst Du, wie: Hier spenden.

Hier kannst Du per PayPal spenden.

About the author

Igor Wallossek

Editor-in-chief and name-giver of igor'sLAB as the content successor of Tom's Hardware Germany, whose license was returned in June 2019 in order to better meet the qualitative demands of web content and challenges of new media such as YouTube with its own channel.

Computer nerd since 1983, audio freak since 1979 and pretty much open to anything with a plug or battery for over 50 years.

Follow Igor:
YouTube Facebook Instagram Twitter

Werbung

Werbung